Design of Multi-Level Inverter for Power Electronics Applications

Malar, E and Ahamed Nadeem, M and Chandrika, R and Dewanath, S K and Divyasree, T (2023) Design of Multi-Level Inverter for Power Electronics Applications. In: 2023 International Conference on Intelligent Technologies for Sustainable Electric and Communications Systems (iTech SECOM), Coimbatore, India.

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Abstract

The proposed research work aims to explore the concept and implementation of a five-level inverter, providing detailed analysis of its working principle, advantages, applications, design considerations, control strategies and experimental results. In recent years, multi-level inverters have gained significant attention in the field of power electronics due to their ability to provide higher voltage levels and improved output waveform quality compared to traditional inverters. Among the various multi-level inverter topologies, the five-level inverter stands out as an effective solution for achieving improved power conversion and enhanced power quality. The report begins by introducing the basic principles of inverter operation and the significance of multi-level inverters in modern power systems. It highlights the limitations of conventional two-level inverters or three-level inverters. Various circuit configurations, such as the cascaded H-bridge and flying capacitor topologies are discussed, providing insights into their pros and cons in terms of complexity, cost, and performance. The working principle of the five-level inverter is thoroughly explained, stating its ability to generate five distinct voltage levels. The advantages of employing a five-level inverter are explored in detail along with its applications. To validate the effectiveness of the five-level inverter, simulation results are also added.

Item Type: Conference or Workshop Item (Paper)
Subjects: D Electrical and Electronics Engineering > Electrical and Electronic
D Electrical and Electronics Engineering > Power Electronics and Drives
Divisions: Electrical and Electronics Engineering
Depositing User: Users 5 not found.
Date Deposited: 03 May 2024 09:57
Last Modified: 03 May 2024 09:57
URI: https://ir.psgitech.ac.in/id/eprint/447

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